Imperas Software Ltd announces that NSITEXE, Inc has selected ImperasDV for advanced RISC-V processor hardware design verification. Provides vector accelerators for AI automotive applications, verified to the level D required to achieve ISO 26262 ASIL. Expands NSITEXE's use of the company's simulation technology, models, verification IP and tools for next-generation 64-bit RISC V-based designs
It covers the verification tasks of various implementations from basic controllers to advanced designs that provide vector extensions, privileged mode security, multi-harts, and custom extensions. The main ImperasDV is an integrated solution for RISC-V processor verification, which provides an adaptable framework based on the open standard RVVI, supports core RTL verification in a "lockstep comparison" approach using the Imperas reference model, and a test suite and other verification IPs. In addition, the solution complements the verification tasks of development teams at the forefront of processor exploration. And the freedom of RISC-V's open-standard ISA enables advanced processor technologies to be implemented in numerous new application areas, with developers working on technologies such as superscalar, out-of-order execution, multithreading, heterogeneous multicore, and processor arrays, and other new and creative approaches for the next generation of domain-specific devices.
Said Hideki Sugimoto, CTO of NSITEXE, Inc., a group company of DENSO Corporation. "To meet the verification requirements of our next-generation processors, we developed an optimized verification flow with ImperasDV, and our design team set detailed configuration options to provide their comprehensive verification program, delivering the industry-leading quality our customers expect "And the flexibility of the RISC-V ISA combined with the performance of vector scaling is an ideal starting point for AI accelerators for automotive applications,"
Nobuyuki Ueyama, president of eSOL TRINITY Co., Ltd., said: "RISC-V's open ISA is driving a new wave of innovation in processor design, covering computing needs in virtually every market segment." It's not an easy task, but The easy-to-use and configurable approach of RVVI provided by ImperasDV enables the eSOL TRINITY team to support the expert design team at NSITEXE and other key RISC-V adopters in Japan. "
"RISC-V's open standard ISA is enabling a fundamental shift in processor development, enabling developers to explore and innovate solutions with optimized solutions for target applications," said Simon Davidmann, CEO of Imperas Software Ltd. V in Design There is a direct impact on the verification task, and since value-added functionality is at the heart of the development, we developed ImperasDV to fit all implementations to allow our clients and users to verify state-of-the-independent art designs. NSITEXE is a pioneer in the development of advanced RISC-V vector accelerators for AI, and we are excited to see Imperas technology and ImperasDV support the quality requirements of automotive applications.
