Renesas Electronics Corporation has expanded its timing solution portfolio with new sub-100fs dot clock solutions for the server, data center, and network infrastructure markets. The new FemtoClock2 series integrates an ultra-low jitter clock generator and jitter attenuator in a small package of 4mm x 4mm2, helping to achieve a cost-effective and simple clock tree for next-generation high-speed interconnect designs.
The device provides best-in-class jitter as low as 64fs RMS, allowing customers to easily meet the next-generation PAM4 requirements for new switch or router designs. With an external dimension of 4mm x 4mm2, the size of this series of products is less than one-third of similar solutions on the market. This enables designers to locate the clock source at the point of use-very close to the device receiving the clock signal-to simplify PCB layout design, reduce crosstalk, and provide clearer signals. Flexibility allows this series to benefit in many applications. It can be configured as a DCO, clock generator, or jitter attenuator, enabling valuable design flexibility and reusability.
Bobby Matinpour, Vice President of Timing Products of Renesas Electronics’ Data Center Business Unit, said: “PAM4 technology has enabled a significant leap in data transmission rates in the communications and data center fields, thereby placing strict requirements on clocks in such systems. “Expanded us. The popular FemtoClock product line, Renesas Electronics provides a new high-performance series, this series provides excellent jitter performance and low power consumption in a small size, the clock can be placed anywhere on the circuit board at the point of use. This greatly simplifies the design by eliminating the additional jitter associated with the large amount of clock routing on the board. "
