The Microchip CEC1302 low-power encrypted embedded controller has a 32-bit ARM Cortex-M4 embedded microcontroller with 128KB of SRAM and 32KB of Boot ROM. The device has an I2C bus to communicate with the system master.
The EC's two SPI memory interfaces allow the EC to read its code from external SPI flash: dedicated SPI and / or shared SPI. The shared SPI interface allows EC code to be stored in the shared SPI chip. Dedicated SPI memory interface provides dedicated SPI flash memory, which is accessible only to the EC.
The device is powered directly from two separate suspended power planes (VBAT and VCC1) and senses the runtime power plane (VCC) to provide "instant start" and system power management functions. It also includes an integrated VCC1 reset interface and a system power management interface that supports low-power states and can drive state changes due to hardware wake-up events.
