Analog Devices AD9691 14-bit dual analog-to-digital converter (ADC) is a 1.25GSPS JESD204B ADC designed to sample wideband analog signals up to 1.5GHz. The device includes an on-chip buffer and sample-and-hold circuit for low power consumption, small size, and ease of use.
The dual-channel, low-power ADC core has a multi-stage, differential pipeline architecture with integrated output error correction logic. Each device includes broadband input to support a variety of user-selectable input ranges. The ADC data output is internally connected to two digital down converters (DDC).
The DDC consists of four cascaded signal processing stages: a 12-bit frequency converter (NCO) and four half-band decimation filters. In addition to the DDC module, the AD9691 also provides multiple functions that simplify the automatic gain control (AGC) function in communication receivers. Programmable threshold detectors use the ADC's fast detect output bits to monitor the input signal power. Due to the low latency of the threshold indicator, designers can quickly reduce the system gain to avoid overrange conditions at the ADC input. Designers can configure high-speed serial outputs based on Class 1 JESD204B in a variety of one-, two-, four-, or eight-channel configurations based on the DDC configuration and the acceptable channel rate of the receiving logic device.
The AD9691 ADC has a rated power of 1.9W per channel and is suitable for communication, spectrum analyzers, network analyzers, integrated RF test solutions, DOCSIS 3.x CMTS uplink receive paths and high-speed data acquisition systems.
Supported and available from stock, the AD9691 evaluation board helps designers evaluate the features of the 14-bit, 1.25GSPS JESD204B dual ADC AD9691.
